Engineer / Senior Engineer, Physical Design (ASIC Place & Route) (San Jose, CA) (7429)

Descripción del puesto

Overview of Role As a Physical Design Engineer, you will be responsible for the entire APR implementation flow from RTL-to-GDS that includes synthesis, floorplan, place and route, CTS, STA, and signoff. You will be reporting to Senior Manager at San Jose Center and joining a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office. Responsibilities Complete entire physical implem…