Intern - Characterization and Support (Fall 2026)

Descripción del puesto

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This is an on-site internship role in San Jose, California, within the Cadence DDR IP group for a Post-Silicon Validation Engineering Intern. (local candidates will be considered) Intern will be responsible for validating both system-level and electrical performance of internal silicon test chips. The role includes debugging silicon issues in close collaboration with analog and digital …