Job Title: Physical Design Engineer Location: San Francisco, CA (Bay Area) Good understanding of Cadence tools (Innovous, Quantus, Voltus). (Must) Deep knowledge about industry standards in Physical Design, Physical aware synthesis, Floorplanning, CTS and place and route. Experience in developing and implementing Power-grid and high speed clock constraints and specifications. Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block level. Expe…
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