Physical Low Power Validation Engineer

Descripción del puesto

Design, deploy, and carry out post-layout low power verification methodologies according to execution schedules and tape-out signoff criteria to ensure successful multi-voltage implementation. Validate the implementation of complex multi-voltage design collateral, performing gate-level checks using industry-standard tools (e.g., Synopsys VCLP) to ensure power/ground integrity and UPF alignment. Drive the resolution of complex Physical Design and Place and Route (P&R) anomalies, specifically mit…