Job Title: Principal / Lead Engineer Location: San Jose, CA Job Summary: We are seeking a highly experienced Principal/Lead Engineer to drive the architecture, development, integration, and delivery of PCIe Gen5/Gen6 subsystems for next-generation SoCs and chiplet- based products. The candidate will lead PCIe Controller, PHY and SerDes integration activities, contribute to Transaction Layer development, and work closely with Architecture, RTL, Verification, DFT, Physical Design, STA, and Silico…
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