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Senior Waveform Architect (All Genders)

Organismo
Stark
País
🇩🇪 Alemania
Lugar
Berlin
Puestos
1
Tipo de vínculo
privado

Descripción del puesto

About Us STARK is a defence technology company redefining the engineering and deployment of autonomous platforms. Our core mission is to deliver fully operational unmanned systems, integrating the critical subsystems, including Electronic Warfare, necessary for NATO forces to maintain a decisive advantage in contested environments. We do whatever is required to achieve platform autonomy, grounded in precision, responsibility, and uncompromising engineering discipline. About the team We are a lean, agile group with a strong systems-minded focus. We operate without silos, seeking visionary technical leaders who can define long-term technology roadmaps while remaining deeply hands-on with complex engineering problems. On the Electronic Warfare team, you will hold the highest level of technical authority for our attack and countermeasure capabilities, driving multi-domain architectures directly onto the modern battlefield. Your mission At STARK, we are building the next generation of autonomous platforms capable of navigating the world's most contested environments. As a Senior Waveform Architect, you will own the entire development, architecture, and implementation of the waveform for our tactical anti-jam radio. In this critical role, you will ensure our communication links remain highly robust and operational under severe electronic countermeasure conditions. Responsibilities Lead the design and implementation of the physical layer (PHY)—waveform, modulation, coding, framing, and synchronisation—from initial architecture to real-time execution. Engineer solutions specifically tailored for challenging jamming scenarios and complex, multi-node long-range link budgets. Own the PHY-side specifications and expose the critical IQ, phase, and timing observables required by the Direction Finding (DF) strand. Define the development guidelines for the strand—including HDL and verification conventions, as well as FPGA build flows. Qualifications You have successfully designed a

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